1. Field of the Invention
The present invention relates to a semiconductor device and the method for making the same and, more specifically, it relates to a semiconductor device with improved high break down voltage characteristics and the method for making the same.
2. Description of the Prior Art
FIG. 1 shows one example of a prior high voltage semiconductor device. The semiconductor device having such structure is disclosed in, for example, Japanese Patent Laying-Open Gazette No. 228766/1984.
Referring to FIG. 1, a N type source region 22 is formed on a first area on a main surface of a P type silicon substrate 21. A N.sup.+ type drain region 23 is formed on a second area on the main surface of the P type silicon substrate 21. An oxide film 24 is formed between the first area and second area on the main surface of the substrate 21. An oxide film 25 thicker than the gate oxide film 24 is formed between the gate oxide film 24 and the second area of the substrate 21. In addition, a gate electrode 26 is formed extending over the gate oxide film 24 and a portion of the oxide film 25. A N.sup.- type drain region 27 having impurity concentration lower than the N.sup.+ type drain region 23 is formed below the oxide film 25. Consequently, the N type source region 22, N.sup.- type drain region 27, N.sup.+ type drain region 23 and the gate electrode 26 form a field effect device including a N channel field effect transistor.
In operation, a positive constant bias (usually 5 V) is applied to the gate electrode 26 to turn the transistor on. The P type silicon substrate 21 and the N type source region 22 are connected to the ground. A positive bias is applied to the N.sup.+ type drain region 23. On this occasion, electrons pass from the N type source region 22 through a channel formed directly below the gate oxide film 24 and through the N.sup.- type drain region 27 to the N.sup.+ type drain region, flowing a current. Consequently, the field effect transistor is turned on.
In the above described prior high voltage semiconductor device, the impurity concentration in the N.sup.- drain region is low causing high resistance, so that it had a problem that gm (transconductance) is lowered.